Dassault Systèmes Enables Unprecedented Semiconductor Design Collaboration

ENOVIA MatrixOne Synchronicity DesignSync 5.0 and New Semiconductor Accelerators Unify, Streamline Entire Semiconductor Design Chain to Shorten Time to Market

WESTFORD, Mass., Feb. 20, 2007 – Dassault Systèmes (NASDAQ: DASTY; Euronext Paris: #13065, DSY.PA), a world leader in 3D and Product Lifecycle Management (PLM) solutions, today extended its leadership in PLM for the semiconductor industry by releasing three new solutions that improve semiconductor business performance. More than 120 organizations, including 13 of the top 15 semiconductor companies, take advantage of Dassault Systèmes semiconductor solutions to boost design productivity, reduce design and development costs, leverage design expertise, improve quality, and accelerate time to market. 

ENOVIA MatrixOne’s Synchronicity DesignSync^® 5.0 is the newest version of the company’s semiconductor design data management platform and is the first unified design data management (DDM) system to span the entire semiconductor design chain, from specification through the completed integrated circuit.  DesignSync 5.0 features a breakthrough module-based design framework that helps companies more quickly deliver increasingly complex semiconductor products, while collaborating efficiently across multiple sites, time zones, tools, projects and processes. 

Using DesignSync 5.0, organizations can manage design data as cohesive blocks rather than as tens of thousands of individual files, streamlining development, eliminating costly errors, and dramatically shortening time to market. 

“Semiconductor companies are faced with an ever-increasing demand for more complex products, quicker delivery, and greater levels of functionality on each chip,” said Stephane Declee, vice president of ENOVIA R&D, “These pressures raise the stakes of getting designs right the first time.  With DesignSync 5.0 ENOVIA is delivering a technology breakthrough with our module-based design data management solution which enables individual design teams distributed across the design chain to independently develop IP modules, while the integration of multiple modules can be managed at a higher level of abstraction.  Inefficient and error prone manual integration procedures can be completely eliminated leading to faster time to market with higher-quality designs.”

Also newly available, the MatrixOne Semiconductor Accelerator™ for IP Management and the MatrixOne Semiconductor Accelerator™ for Team Collaboration are the latest in a series of focused solutions from ENOVIA MatrixOne that enable semiconductor customers to rapidly meet unique product development challenges while speeding PLM deployment and easing user adoption.  The new semiconductor accelerators are built on the ENOVIA MatrixOne PLM platform and are seamlessly integrated with MatrixOne’s Synchronicity DesignSync solution. They extend the value of DesignSync 5.0 by bundling semiconductor business process applications with industry-specific terminology, data models, pre-defined work processes, reports and role-based user interfaces. 

The need for collaborative semiconductor design management solutions is supported by a recent study[1] that found:

• fewer than half of semiconductor product launches occur by their original target date;
• more than 40 percent do not make it into production;
• more than 60 percent of all semiconductor designs require at least one re-spin of the die; and
• more than 40 percent of development projects exceed budget.

According to ENOVIA CEO Joel Lemke, “Companies looking to be better than these industry norms and positively impact design cycle time need well-managed team collaboration, issue management and tools to allow them to rapidly react to issues. These new ENOVIA semiconductor design data management solutions help our customers gain a competitive advantage through accelerated development and shortened time-to-market.”

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[1] <//font><//font>2006 study by Kalypso Partners LLC<//font><//font>